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description the M37733EHLxxxhp is a single-chip microcomputer using the 7700 family core. this single-chip microcomputer has a cpu a nd a bus interface unit. the cpu is a 16-bit parallel processor t hat can be an 8-bit parallel processor, and the bus interface unit enha nces the memory access efficiency to execute instructions fast. this microcomputer also includes a 32 khz oscillation circuit, in addition to the prom, ram, multiple-function timers, serial i/o, a-d converter, and so on. its strong points are the low power dissipation, the low sup ply voltage, and the small package. the M37733EHLxxxhp has the same function as the m37733mhlxxxhp except that the built-in rom is prom. (refer to the basic function blocks description.) features l number of basic instructions ............................... ................... 103 l memory size prom .............................................. 124 kbyt es ram ................................................ 3968 bytes l instruction execution time the fastest instruction at 12 mhz frequency ................ ...... 333 ns l single power supply ........................................ .............. 2.7 C 5.5 v l low power dissipation (at 3 v supply voltage, 12 mhz frequen cy) ............................................ 9 mw (typ.) l interrupts ............................................................ 19 types, 7 levels l multiple-function 16-bit timer ............................. .................... 5 + 3 l serial i/o (uart or clock synchronous) ..................... ................ 3 l 10-bit a-d converter ....................................... ....... 8-channel inputs l watchdog timer l programmable input/output (ports p0, p1, p2, p3, p4, p5, p6, p7, p8) .............. ................. 68 l clock generating circuit ................................... ..... 2 circuits built-in l small package ..................... 80-pin plastic molded fine-pitch qfp (0.5 mm lead pitch) application control devices for general commercial equipment such as off ice automation, office equipment, personal information equipment , and so on. control devices for general industrial equipment such as communication equipment, and so on. pin configuration (top view) preliminary notice: this is not a final specification. some parametric limits are subject to change. mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp outline 80p 6d-a, 80p 6q -a p3 0 / r/ w p3 2 / al e p3 1 / bh e p3 3 / hl da x out e cnv ss r eset p4 0 / ho l d 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 p8 6 / r x d 1 p8 7 / t x d 1 p0 0 / a 0 p0 1 / a 1 p0 2 / a 2 p0 3 / a 3 p0 4 / a 4 p0 5 / a 5 p0 6 / a 6 p0 7 / a 7 p1 0 / a 8 / d 8 p1 1 / a 9 / d 9 p1 2 / a 10 / d 10 p1 3 / a 11 / d 11 p1 4 / a 12 / d 12 p1 5 / a 13 / d 13 p1 6 / a 14 / d 14 p1 7 / a 15 / d 15 p2 0 / a 16 / d 0 p2 1 / a 17 / d 1 60 59 58 75 74 73 72 71 69 68 67 66 65 70 80 79 78 77 76 64 63 62 61 30 26 27 28 29 31 32 33 34 35 36 21 23 22 24 25 37 38 39 40 p4 1 / rdy p4 2 / f 1 byt e x i n v ss p2 7 / a 23 / d 7 p2 6 / a 22 / d 6 p2 5 / a 21 / d 5 p2 4 / a 20 / d 4 p2 3 / a 19 / d 3 p2 2 / a 18 / d 2 p6 6 / tb 1 i n p6 5 / tb 0 i n p6 4 / i nt 2 p6 3 / i nt 1 p6 2 / i nt 0 p6 1 / ta 4 i n p6 0 / ta 4 out p5 7 / ta 3 i n / ki 3 p5 6 / ta 3 out / ki 2 p5 5 / ta 2 i n / ki 1 p5 4 / ta 2 out / ki 0 p5 3 / ta 1 i n p5 2 / ta 1 out p5 1 / ta 0 i n p5 0 / ta 0 out p4 7 p8 5 / cl k 1 p8 4 / ct s 1 / rt s 1 p8 3 / t x d 0 p8 2 / r x d 0 / cl k s 0 p8 1 / cl k 0 p8 0 / ct s 0 / rt s 0 / cl k s 1 v cc av cc v re f av ss v ss p7 6 / an 6 / x co ut p7 5 / an 5 / ad tr g / t x d 2 p7 4 / an 4 / r x d 2 p7 3 / an 3 / cl k 2 p7 2 / an 2 / ct s 2 p7 1 / an 1 p7 0 / an 0 p6 7 / tb 2 i n / f sub m37733e hl xxxhp p4 3 p4 4 p4 5 p4 6 p7 7 / an 7 / x ci n 1 2 3 4 5
preliminary notice: this is not a final specification. some parametric limits are subject to change. 2 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp M37733EHLxxxhp block diagram x in x out e reset reset input v ref p8(8) p7(8) p5(8) p6(8) p4(8) p3(4) p2(8) p1(8) cnvss byte p0(8) uart1(9) uart0(9) av ss (0v) av cc (0v) v ss v cc a-d converter(10) x cin x cout x cin x cout clock input clock output enable output reference voltage input external data bus width selection input clock generating circuit instruction register(8) arithmetic logic unit(16) accumulator a(16) accumulator b(16) index register x(16) index register y(16) stack pointer s(16) direct page register dpr(16) processor status register ps(11) input butter register ib(16) data bank register dt(8) program bank register pg(8) program counter pc(16) incrementer/decrementer(24) data address register da(24) program address register pa(24) incrementer(24) instruction queue buffer q 2 (8) instruction queue buffer q 1 (8) instruction queue buffer q 0 (8) data buffer db l (8) data buffer db h (8) prom 124 kbytes ram 3968 bytes timer ta3(16) timer ta4(16) timer ta2(16) timer ta1(16) timer ta0(16) watchdog timer timer tb2(16) timer tb1(16) timer tb0(16) address bus data bus(odd) data bus(even) input/output port p8 input/output port p7 input/output port p6 input/output port p5 input/output port p4 input/output port p3 input/output port p2 input/output port p1 input/output port p0 uart2(9)
3 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. functions of M37733EHLxxxhp memory size input/output ports multi-function timers interrupts clock generating circuit power dissipation parameter functions number of basic instructions 103 instruction execution time 333 ns (the fastest instruction at external clock 12 mhz frequency) prom 124 kbytes ram 3968 bytes p0 ?p2, p4 ?p8 8-bit 5 8 p3 4-bit 5 1 ta0, ta1, ta2, ta3, ta4 16-bit 5 5 tb0, tb1, tb2 16-bit 5 3 serial i/o (uart or clock synchronous serial i/o) 5 3 a-d converter 10-bit 5 1 (8 channels) watchdog timer 12-bit 5 1 3 external types, 16 internal types each interrupt can be set to the priority level (0 ?7.) 2 circuits built-in (externally connected to a ceramic resonator or a quartz-crystal oscillator) supply voltage 2.7 ?5.5 v 9 mw (at 3 v supply voltage, external clock 12 mhz frequency) 22.5 mw (at 5 v supply voltage, external clock 12 mhz frequency) input/output voltage 5 v output current 5 ma memory expansion maximum 16 mbytes operating temperature range ?0 to 85 ? device structure cmos high-performance silicon gate process package 80-pin plastic molded fine-pitch qfp (80p6d-a;0.5 mm lead pitch) input/output characteristic
preliminary notice: this is not a final specification. some parametric limits are subject to change. 4 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp pin description x in clock input input x out clock output output pin name input/output functions vcc, power source apply 2.7 ?5.5 v to vcc and 0 v to vss. vss cnvss cnvss input input this pin controls the processor mode. connect to vss for the single-chip mode and the memory expansion mode, and to vcc for the microprocessor mode. _____ reset reset input input when ??level is applied to this pin, the microcomputer enters the reset state. these are pins of main-clock generating circuit. connect a ceramic resonator or a quartz- crystal oscillator between x in and x out . when an external clock is used, the clock source should be connected to the x in pin, and the x out pin should be left open. _ e enable output output this pin functions as the enable signal output pin which indicates the access status in the internal __ bus. when output level of e signal is ?? data/instruction read or data write is performed. byte external data input in the memory expansion mode or the microprocessor mode, this pin determines whether the bus width external data bus has an 8-bit width or a 16-bit width. the data bus has a 16-bit width when ? selection input signal is input and an 8-bit width when ??signal is input. avcc, analog power power source input pin for the a-d converter. externally connect avcc to vcc and avss to vss. avss source input v ref reference input this is reference voltage input pin for the a-d converter. voltage input p0 0 ?p0 7 i/o port p0 i/o in the single-chip mode, port p0 becomes an 8-bit i/o port. an i/o direction register is available so that each pin can be programmed for input or output. these ports are in the input mode when reset. in the memory expansion mode or the microprocessor mode, these pins output address (a 0 ?a 7 ). p1 0 ?p1 7 i/o port p1 i/o in the single-chip mode, these pins have the same functions as port p0. when the byte pin is set to ??in the memory expansion mode or the microprocessor mode and external data bus has a 16-bit width, high-order data (d 8 ?d 15 ) is input/output or an address (a 8 ?a 15 ) is output. when the byte pin is ??and an external data bus has an 8-bit width, only address (a 8 ?a 15 ) is output. p2 0 ?p2 7 i/o port p2 i/o in the single-chip mode, these pins have the same functions as port p0. in the memory expansion mode or the microprocessor mode, low-order data (d 0 ?d 7 ) is input/output or an address (a 16 ?a 23 ) is output. p3 0 ?p3 3 i/o port p3 i/o in the single-chip mode, these pins have the same function as port p0. in the memory expansion __ ___ ____ mode or the microprocessor mode, r/w , bhe , ale, and hlda signals are output. p4 0 ?p4 7 i/o port p4 i/o in the single-chip mode, these pins have the same functions as port p0. in the memory expansion ____ ___ mode or the microprocessor mode, p4 0 , p4 1 , and p4 2 become hold and rdy input pins, and a clock f 1 output pin, respectively. functions of the other pins are the same as in the single-chip mode. however, in the memory expansion mode, p4 2 can be selected as an i/o port. p5 0 e p5 7 i/o port p5 i/o in addition to having the same functions as port p0 in the single-chip mode, these pins also __ __ function as i/o pins for timers a0 to a3 and input pins for key input interrupt input ( ki 0 e ki 3 ). p6 0 e p6 7 i/o port p6 i/o in addition to having the same functions as port p0 in the single-chip mode, these pins also ___ ___ function as i/o pins for timer a4, input pins for external interrupt input ( int 0 e int 2 ) and input pins for timers b0 to b2. p6 7 also functions as sub-clock f sub output pin. p7 0 e p7 7 i/o port p7 i/o in addition to having the same functions as port p0 in the single-chip mode, these pins function as input pins for a-d converter. p7 2 to p7 5 also function as i/o pins for uart2. additionally, p7 6 and p7 7 have the function as the output pin (x cout ) and the input pin (x cin ) of the sub-clock (32 khz) oscillation circuit, respectively. when p7 6 and p7 7 are used as the x cout and x cin pins, connect a resonator or an oscillator between the both. p8 0 e p8 7 i/o port p8 i/o in addition to having the same functions as port p0 in the single-chip mode, these pins also function as i/o pins for uart 0 and uart 1.
5 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. functions supply 5v?0% to v cc and 0v to v ss . connect to v pp when programming or verifing. connect to v pp when programming or verifing. connect to v ss . connect a ceramic resonator between x in and x out . keep open. connect av cc to v cc and av ss to v ss . connect to v ss . port p0 functions as the lower 8 bits address input (a 0 ?a 7 ). port p1 functions as the higher 8 bits address input (a 8 ?a 15 ). port p2 functions as the 8 bits data bus(d 0 ?d 7 ). p3 0 functions as the most significant bit address input (a 16 ). connect to v ss . connect to v ss . ___ __ __ p5 0 , p5 1 and p5 2 function as pgm , oe and ce input pins respectively. connect p5 3 , p5 4 , p5 5 and p5 6 to v cc . connect p5 7 to v ss . connect to v ss . connect to v ss . connect to v ss . input/output input input input input output output input input input i/o input input input input input input input name power supply v pp input v pp input reset input clock input clock output enable output analog supply input reference voltage input address input (a 0 ?a 7 ) address input (a 8 ?a 15 ) data i/o (d 0 ?d 7 ) address input (a 16 ) input port p3 input port p4 control signal input input port p6 input port p7 input port p8 pin v cc , v ss cnv ss byte ____ reset x in x out _ e av cc , av ss v ref p0 0 ?p0 7 p1 0 ?p1 7 p2 0 ?p2 7 p3 0 p3 1 ?p3 3 p4 0 ?p4 7 p5 0 ?p5 7 p6 0 ?p6 7 p7 0 ?p7 7 p8 0 ?p8 7 pin description (eprom mode)
preliminary notice: this is not a final specification. some parametric limits are subject to change. 6 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp note. write to the oscillation circuit control register 1 as the flow shown in figure 2. oscillation circuit control register 1 main clock division selection bit 0 : main clock is divided by 2. 1 : main clock is not divided by 2. main clock external input selection bit 0 : main-clock oscillation circuit is operating by itself. watchdog timer is used at returning from stp state. 1 : main-clock is input externally. watchdog timer is not used at returning from stp state. sub clock external input selection bit 0 : sub-clock oscillation circuit is operating by itself. p7 6 functions as x cout pin. watchdog timer is used at returning from stp state. 1 : sub-clock is input externally. p7 6 functions as i/o port. watchdog timer is not used at returning from stp state. always ??( ??at reset) 0 : always ??(however, writing data ?5 16 ?shown in figure 2 is possible.) clock prescaler reset bit address 6f 16 cc 0 cc 1 cc 2 01 76543210 fig. 1 bit configuration of oscillation circuit control register 1 (corresponding to figure 63 in data sheet ?37733mhbxxxfp? fig. 2 how to write data in oscillation circuit control register 1 (identical with figure 64 in data sheet ?37733mhbxxxfp? writing data ?0 16 ?(ldm instruction) reset clock prescaler writing data ?5 16 ?(ldm instruction) writing data ?y 16 ?(ldm instruction) cc 2 to cc 0 selection bits ?how to reset clock prescaler ?how to write in cc 2 to cc 0 selection bits note. ??is the sum of bits to be set. for example, when setting bits 2 and 1 to ?? ??becomes ?? next instruction basic function blocks the M37733EHLxxxhp has the same functions as the m37733mhbxxxfp except for the following : (1) the built-in rom is prom. (2) the package is different. (3) the reset circuit is different. (4) the status of bit 3 of the oscillation circuit control register 1 (address 6f 16 ) at a reset is different. (5) the usage condition of bit 3 of the oscillation circuit control register 1 is different. accordingly, refer to the basic function blocks description in the m37733mhbxxxfp except for figure 1 (bit configuration of the oscillation circuit control register 1) , figure 3 and figure 4 (reset circuit). in the M37733EHLxxxhp, bit 3 of the oscillation circuit control register 1 must be ?? (refer to figure 1.) the status of this bit at a reset is ??
7 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. reset circuit _____ the microcomputer is released from the reset state when the reset pin is returned to ??level after holding it at ??level with the power source voltage at 2.7 ?5.5 v. program execution starts at the address formed by setting address a 23 ?a 16 to 00 16 , a 15 ?a 8 to the contents of address ffff 16 , and a 7 ?a 0 to the contents of address fffe 16 . figure 3 shows the microcomputer internal status during reset. figure 4 shows an example of a reset circuit. when the stabilized clock is input from the external to the main-clock oscillation circuit, the reset input voltage must be 0.55 v or less when the power source voltage reaches 2.7 v. when a resonator/oscillator is connected to the main-clock oscillation circuit, change the reset input voltage from ??to ??after the main-clock oscillation is fully stabilized. fig. 4 example of a reset circuit v cc reset reset v cc 0v 0v 2.7v 0.55v power on note. in this case, stabilized clock is input from the external to the main-clock oscillation circuit. perform careful evalvation at the system design level before using.
preliminary notice: this is not a final specification. some parametric limits are subject to change. 8 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp fig. 3 microcomputer internal status during reset address 00 16 00 00 00 16 00 16 00 16 00 16 00 16 00 16 0 11 00 00 0 0 ??? 00 16 00 16 0 00 00 00 00 00 00 00 00 10 00 00 10 00 00 10 10 00 16 000 0 0 00 16 00 16 00 16 00 16 00 16 00 16 0 001 00 0 0 001 001 00 0 0 00 0 0 0 00 16 (04 16 ) (05 16 ) (08 16 ) (09 16 ) (0c 16 ) (0d 16 ) (10 16 ) (11 16 ) (14 16 ) (1e 16 ) (1f 16 ) (30 16 ) (38 16 ) (34 16 ) (3c 16 ) (35 16 ) (3d 16 ) (40 16 ) (42 16 ) (44 16 ) (56 16 ) (57 16 ) (58 16 ) (59 16 ) (5a 16 ) (5b 16 ) (5c 16 ) (5d 16 ) (5e 16 ) (5f 16 ) port p0 direction register port p1 direction register port p2 direction register port p3 direction register port p4 direction register port p5 direction register port p6 direction register port p7 direction register port p8 direction register a-d control register 0 a-d control register 1 uart 0 transmit/receive mode register uart 1 transmit/receive control register 1 uart 1 transmit/receive mode register uart 0 transmit/receive control register 0 uart 1 transmit/receive control register 0 uart 0 transmit/receive control register 1 count start flag one- shot start flag up-down flag timer a0 mode register timer a1 mode register timer a2 mode register timer a3 mode register timer a4 mode register timer b0 mode register timer b1 mode register timer b2 mode register processor mode register 0 processor mode register 1 address (60 16 ) (7f 16 ) (6c 16 ) (6d 16 ) (6e 16 ) (6f 16 ) (70 16 ) (71 16 ) (72 16 ) (73 16 ) (74 16 ) (75 16 ) (76 16 ) (77 16 ) (78 16 ) (79 16 ) (7a 16 ) (7b 16 ) (7c 16 ) (7d 16 ) (7e 16 ) watchdog timer register oscillation circuit control register 0 port function control register serial transmit control register oscillation circuit control register 1 a-d/uart2 trans./rece. interrupt control register uart 0 transmission interrupt control register uart 0 receive interrupt control register uart 1 transmission interrupt control register uart 1 receive interrupt control register timer a0 interrupt control register timer b2 interrupt control register timer a1 interrupt control register timer a2 interrupt control register timer a3 interrupt control register timer a4 interrupt control register timer b0 interrupt control register timer b1 interrupt control register processor status register (ps) program bank register (pg) program counter (pc h ) program counter (pc l ) direct page register (dpr) data bank register (dt) int 0 interrupt control register 0 0 0 contents of other registers and ram are undefined during reset. initialize them by software. ? 0 0 0 00 00 0 ? 001 000 000 000 000 1?? 0 1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0 0 0 0 00 00 0 0 0 00 16 00 16 content of ffff 16 content of fffe 16 0000 16 fff 16 0 0 0 0 0 0 int 1 interrupt control register int 2 /key input interrupt control register 00 16 0 01 0 00 00 (61 16 ) (63 16 ) (64 16 ) (68 16 ) watchdog timer frequency selection flag memory allocation control register uart2 transmit/receive mode register uart2 transmit/receive control register 0 0 0 0 001 0 00 0 00 0 0 (69 16 ) uart2 transmit/receive control register 1 0 000 0 00 000 1 0 010 0 00 0 00 16 0
9 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. eprom mode the M37733EHLxxxhp features an eprom mode in addition to its _____ normal modes. when the reset signal level is ?? the chip automatically enters the eprom mode. table 1 list the correspondence between pins and figure 5 shows the pin connections in the eprom mode. the eprom mode is the 1m mode for the eprom that is equivalent to the m5m27c101k. when in the eprom mode, ports p0, p1, p2, p3 0 , p5 0 , p5 1 , p5 2 , cnv ss and byte are used for the eprom (equivalent to the m5m27c101k). when in this mode, the built-in prom can be programmed or read from using these pins in the same way as with the m5m27c101k. this chip does not have device identifier mode, so that set the corresponding program algorithm. the program area should specify address 01000 16 ?1ffff 16 . connect the clock which is either ceramic resonator or external clock to x in pin and x out pin. fig. 5 pin connection in eprom mode outline 80p6d-a * : connect to ceramic oscillation circuit. : it is used in the eprom mode. p8 6 /r x d 1 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? p8 7 /t x d 1 p0 0 /a 0 p0 1 /a 1 p0 2 /a 2 p0 3 /a 3 p0 4 /a 4 p0 5 /a 5 p0 6 /a 6 p0 7 /a 7 p1 0 /a 8 /d 8 p1 1 /a 9 /d 9 p1 2 /a 10 /d 10 p1 3 /a 11 /d 11 p1 4 /a 12 /d 12 p1 5 /a 13 /d 13 p1 6 /a 14 /d 14 p1 7 /a 15 /d 15 p2 0 /a 16 /d 0 p2 1 /a 17 /d 1 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? p6 6 /tb1 in p6 5 /tb0 in p6 4 / int 2 p6 3 / int 1 p6 2 / int 0 p6 1 /ta4 in p6 0 /ta4 out p5 7 /ta3 in / ki 3 p5 6 /ta3 out / ki 2 p5 5 /ta2 in / ki 1 p5 4 /ta2 out / ki 0 p5 3 / ta1 in p5 2 / ta1 out p5 1 / ta0 in p5 0 / ta0 out p4 7 p4 6 p4 5 p4 4 p4 3 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? p8 5 /clk 1 p8 4 / cts 1 / rts 1 p8 3 /t x d 0 p8 2 /r x d 0 /clks 0 v cc av cc v ref av ss p7 7 /an 7 /x cin p7 6 /an 6 /x cout p7 5 /an 5 / ad trg /txd 2 p7 4 /an 4 /rxd 2 p7 3 /an 3 /clk 2 p7 2 /an 2 /cts 2 p7 1 /an 1 p7 0 /an 0 p8 1 /clk 0 p8 0 / cts 0 / rts 0 /clks 1 v ss p2 2 /a 18 /d 2 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? p2 3 /a 19 /d 3 p2 4 /a 20 /d 4 p2 5 /a 21 /d 5 p2 6 /a 22 /d 6 p2 7 /a 23 /d 7 p3 0 /r/ w p3 1 / bhe p3 2 /ale p3 3 / hlda v ss e x out x in reset cnv ss byte p4 0 / hold p4 1 / rdy 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 M37733EHLxxxhp a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 a 15 d 0 d 1 pgm oe ce d 2 d 3 d 4 d 5 d 6 d 7 v pp v ss v cc ? y ? t * p4 2 / f 1 a 16 f sub p6 7 /tb2 in /
preliminary notice: this is not a final specification. some parametric limits are subject to change. 10 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp table 1 pin function in eprom mode v cc v pp v ss address input data i/o __ ce __ oe ___ pgm M37733EHLxxxhp v cc cnv ss , byte v ss ports p0, p1, p3 0 port p2 p5 2 p5 1 p5 0 m5m27c101k v cc v pp v ss a 0 ?a 16 d 0 ?d 7 __ ce __ oe ___ pgm
11 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. function in eprom mode 1m mode (equivalent to the m5m27c101k) reading __ __ to read the eprom, set the ce and oe pins to a ??level. input the address of the data (a 0 ?a 16 ) to be read, and the data will be output to the i/o pins d 0 ?d 7 . the data i/o pins will be floating when either __ __ the ce or oe pins are in the ??state. programming programming must be performed in 8 bits by a byte program. to __ __ program to the eprom, set the ce pin to a ??level and the oe pin to a ??level. the cpu will enter the programming mode when 12.5 v is applied to the v pp pin. the address to be programmed to is selected with pins a 0 ?a 16 , and the data to be programmed is input to pins d 0 ___ ?d 7 . set the pgm pin to a ??level to being programming. programming operation to program the M37733EHLxxxhp, first set v cc = 6 v, v pp = 12.5 v, and set the address to 01000 16 . apply a 0.2 ms programming pulse, check that the data can be read, and if it cannot be read ok, repeat the procedure, applying a 0.2 ms programming pulse and checking that the data can be read until it can be read ok. record the accumulated number of pulse applied (x) before the data can be read ok, and then write the data again, applying a further once this number of pulses (0.2 5 x ms). when this series of programming operations is complete, increment the address, and continue to repeat the procedure above until the last address has been reached. finally, when all addresses have been programmed, read with v cc = v pp = 5 v (or v cc = v pp = 5.5 v). table 2. i/o signal in each mode read-out output disable programming programming verify program disable v il v il v ih v il v il v ih v il v ih x v ih v il v ih x x x v il v ih v ih 5 v 5 v 5 v 12.5 v 12.5 v 12.5 v 5 v 5 v 5 v 6 v 6 v 6 v output floating floating input output floating __ ce __ oe ___ pgm v pp v cc data i/o mode pin note 1 : an x indicates either v il or v ih . programming operation (equivalent to the m5m27c101k) ac electrical characteristics (t a = 25 ?5 ?, v cc = 6 v ?0.25 v, v pp = 12.5 ?0.3 v, unless otherwise noted) address setup time __ oe setup time data setup time address hold time data hold time output enable to output float delay v cc setup time v pp setup time ___ pgm pulse width ___ pgm over program pulse width __ ce setup time __ data valid from oe m s m s m s m s m s ns m s m s ms ms m s ns t as t oes t ds t ah t dh t dfp t vcs t vps t pw t opw t ces t oe min. 2 2 2 0 2 0 2 2 0.19 0.19 2 typ. 0.2 max. 130 0.21 5.25 150 symbol parameter test conditions limits unit
preliminary notice: this is not a final specification. some parametric limits are subject to change. 12 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp ac waveforms programming algorithm flow chart test conditions for a.c. characteristics input voltage : v il = 0.45 v, v ih = 2.4 v input rise and fall times (10 % ?90 %) : 20 ns reference voltage at timing measurement : input, output l = 0.8 v, h = 2 v *4.5 v v cc = v pp 5.5 v start addr=first location v cc =6.0 v v pp =12.5 v x=0 program one pulse of 0.2 ms x=x+1 x=25? verify byte last addr? v cc =v pp =*5.0 v device passed program pulse of 0.2x ms duration verify all byte fail fail device failed fail device failed yes pass yes increment addr no verify byte pass pass no t dfp t ah t dh t ds t as t vps t vcs t ces t pw t opw t oes t oe data set program verify v ih v il v ih /v oh v il /v ol v pp v cc v cc +1 v cc v ih v il v ih v il v ih v il address data v pp v cc ce pgm oe data output valid
13 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. safety instructions (1) a high voltage is used for programming. take care that over- voltage is not applied. take care especially at power on. (2) the programmable M37733EHLhp that is shipped in blank is also provided. for the M37733EHLhp, mitsubishi electric corp. does not perform prom programming test and screening following the assembly processes. to improve reliability after programming, performing programming and test according to the flow below before use is recommended. addressing modes the M37733EHLxxxhp has 28 powerful addressing modes. refer to the 7700 family software manual for the details. machine instruction list the M37733EHLxxxhp has 103 machine instructions. refer to the 7700 family software manual for the details. data required for prom ordering please send the following data for writing to prom. (1) M37733EHLxxxhp writing to prom order confirmation form (2) 80p6d, 80p6q mark specification form (3) rom data (eprom 3 sets) programming with prom programmer function check in target device verify test with prom programmer caution : never expose to 150 c exceeding 100 hours. screening (leave at 150 c for 40 hours) (caution)
preliminary notice: this is not a final specification. some parametric limits are subject to change. 14 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp symbol parameter conditions ratings unit vcc power source voltage ?.3 to +7 v avcc analog power source voltage ?.3 to +7 v v i _____ input voltage reset , cnvss, byte ?.3 to +12 (note) v input voltage p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 0 ?p3 3, p4 0 ?p4 7 , p5 0 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , p8 0 ?p8 7 , v ref , x in output voltage p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 0 ?p3 3, p4 0 ?p4 7 , p5 0 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , p8 0 ?p8 7, _ x out , e p d power dissipation ta = 25 ? 200 mw t opr operating temperature ?0 to +85 ? t stg storage temperature 65 to +150 ? v i v o absolute maximum ratings ?.3 to vcc + 0.3 v ?.3 to vcc + 0.3 v note. when the eprom is programmed, input voltage of pins cnv ss and byte is 13 v respectively. limits min. typ. max. f(x in ) : operating 2.7 5.5 f(x in ) : stopped, f(x cin ) = 32.768 khz 2.7 5.5 avcc analog power source voltage vcc v vss power source voltage 0v avss analog power source voltage 0 v high-level input voltage p0 0 ?p0 7 , p3 0 ?p3 3 , p4 0 ?p4 7 , p5 0 ?p5 7 , p6 0 ?p6 7 , _____ p7 0 ?p7 7 , p8 0 ?p8 7 , x in , reset , cnvss, byte, x cin (note 3) high-level input voltage p1 0 ?p1 7 , p2 0 ?p2 7 (in single-chip mode) high-level input voltage p1 0 ?p1 7 , p2 0 ?p2 7 (in memory expansion mode and microprocessor mode) low-level input voltage p0 0 ?p0 7 , p3 0 ?p3 3 , p4 0 ?p4 7 , p5 0 ?p5 7 , p6 0 ?p6 7 , _____ p7 0 ?p7 7 , p8 0 ?p8 7 , x in , reset , cnvss, byte, x cin (note 3) low-level input voltage p1 0 ?p1 7 , p2 0 ?p2 7 (in single-chip mode) low-level input voltage p1 0 ?p1 7 , p2 0 ?p2 7 (in memory expansion mode and microprocessor mode) high-level peak output current p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 0 ?p3 3 , p4 0 ?p4 7 , p5 0 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , p8 0 ?p8 7 high-level average output current p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 0 ?p3 3 , p4 0 ?p4 7 , p5 0 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , p8 0 ?p8 7 low-level peak output current p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 0 ?p3 3 , p4 0 ?p4 3 , p5 4 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , p8 0 ?p8 7 low-level peak output current p4 4 ?p4 7 , p5 0 ?p5 3 low-level average output current p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 0 ?p3 3 , p4 0 ?p4 3 , p5 4 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , p8 0 ?p8 7 i ol(avg) low-level average output current p4 4 ?p4 7 , p5 0 ?p5 3 12 ma f(x in ) main-clock oscillation frequency (note 4) 12 mhz f(x cin) sub-clock oscillation frequency 32.768 50 khz unit symbol parameter recommended operating conditions (vcc = 2.7 ?5.5 v, ta = ?0 to +85 ?, unless otherwise noted) v vcc power source voltage notes 1. average output current is the average value of a 100 ms interval. 2. the sum of i ol(peak) for ports p0, p1, p2, p3, and p8 must be 80 ma or less, the sum of i oh(peak) for ports p0, p1, p2, p3, and p8 must be 80 ma or less, the sum of i ol(peak) for ports p4, p5, p6, and p7 must be 100 ma or less, and the sum of i oh(peak) for ports p4, p5, p6, and p7 must be 80 ma or less. 3. limits v ih and v il for x cin are applied when the sub clock external input selection bit = ?? 4. the maximum value of f(x in ) = 6 mhz when the main clock division selection bit = ?? 0.8 vcc 0.8 vcc 0.5 vcc 0 0 0 vcc vcc vcc 0.2vcc 0.2vcc 0.16vcc ?0 ? 10 16 5 v v v v v v ma ma ma ma ma v ih v ih v ih v il v il v il i oh(peak) i oh(avg) i ol(peak) i ol(peak) i ol(avg)
15 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. unit electrical characteristics (vcc = 5 v, vss = 0 v, ta = ?0 to +85 ?, f(x in ) = 12 mhz, unless otherwise noted) symbol parameter test conditions 3 2.5 4.7 v v oh v oh ?.5 ?.18 high-level output voltage p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 3 , p4 0 ?p4 7 , p5 0 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , p8 0 ?p8 7 high-level output voltage p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 3 high-level output voltage p3 0 ? p3 2 _ high-level output voltage e low-level output voltage p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 3 , p4 0 ?p4 3 , p5 4 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , p8 0 ?p8 7 low-level output voltage p4 4 ?p4 7 , p5 0 ?p5 3 low-level output voltage p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 3 low-level output voltage p3 0 ?p3 2 _ low-level output voltage e ____ ___ hysteresis hold , rdy , ta0 in ?ta4 in , tb0 in ?tb2 in , ___ ___ ____ ____ ____ ____ int 0 ? int 2 , ad trg , cts 0 , cts 1 , cts 2 , clk 0 , __ __ clk 1 , clk 2 , ki 0 ? ki 3 _____ hysteresis reset hysteresis x in hysteresis x cin (when external clock is input) high-level input current p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 0 ?p3 3 , p4 0 ?p4 7 , p5 0 ?p5 7 , p6 0 ?p6 7 , p7 0 ?p7 7 , _____ p8 0 ?p8 7 , x in , reset , cnvss, byte low-level input current p0 0 ?p0 7 , p1 0 ?p1 7 , p2 0 ?p2 7 , p3 0 ?p3 3 , p4 0 ?p4 7 , p5 0 ?p5 3 , p6 0 , p6 1 , p6 5 ?p6 7 , _____ p7 0 ?p7 7 , p8 0 ?p8 7 , x in , reset , cnvss, byte v oh 3.1 4.8 2.6 3.4 4.8 2.6 v oh v ol v v v v 2 0.5 1.8 1.5 v v ol 0.45 1.9 0.43 0.4 1.6 0.4 0.4 v v v 0.4 0.1 0.2 0.1 0.1 0.06 0.1 0.06 v cc = 5 v, i oh = ?0 ma v cc = 3 v, i oh = ? ma v cc = 5 v, i oh = ?00 m a v cc = 5 v, i oh = e10 ma v cc = 5 v, i oh = e400 m a v cc = 3 v, i oh = e1 ma v cc = 5 v, i oh = e10 ma v cc = 5 v, i oh = e400 m a v cc = 3 v, i oh = e1 ma v cc = 5 v, i ol = 10 ma v cc = 3 v, i ol = 1 ma v cc = 5 v, i ol = 16 ma v cc = 3 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 5 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 3 v, i ol = 1 ma v cc = 5 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 3 v, i ol = 1 ma v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v, v i = 5 v v cc = 3 v, v i = 3 v v cc = 5 v, v i = 0 v v cc = 3 v, v i = 0 v v i = 0 v, without a pull-up transistor v i = 0 v, with a pull-up transistor when clock is stopped. 1 0.7 0.5 0.4 0.4 0.26 0.4 0.26 v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v e0.25 e0.08 2 5 4 e5 e4 e5 e4 e1.0 e0.35 v v v v m a m a m a ma v v ol v ol v ol v t+ e v te v t+ e v te v t+ e v te v t+ e v te i ih i il i il v ram low-level input current p5 4 e p5 7 , p6 2 e p6 4 ram hold voltage limits min. typ. max.
preliminary notice: this is not a final specification. some parametric limits are subject to change. 16 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp v cc = 5 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 6 mhz), f(x cin ) = 32.768 khz, in operating (note 1) v cc = 3 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 6 mhz), f(x cin ) = 32.768 khz, in operating (note 1) v cc = 3 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 0.75 mhz), f(x cin ) : stopped, in operating v cc = 3 v, f(x in ) = 12 mhz (square waveform), f(x cin ) = 32.768 khz, when a wit instruction is executed (note 2) v cc = 3 v, f(x in ) : stopped, f(x cin ) = 32.768 khz, in operating (note 3) v cc = 3 v, f(x in ) : stopped, f(x cin ) = 32.768 khz, when a wit instruction is executed (note 4) ta = 25 ?, when clock is stopped ta = 85 ?, when clock is stopped ma ma ma m a m a m a m a m a max. 9 6 0.8 12 60 6 1 20 limits typ. 4.5 3 0.4 6 30 3 unit min. test conditions symbol parameter electrical characteristics (vcc = 5 v, vss = 0 v, ta = e40 to +85 ?c, unless otherwise noted) when single-chip mode, output pins are open, and other pins are v ss . power source current i cc limits min. typ. max. ? resolution v ref = v cc 10 bits ? absolute accuracy v ref = v cc 3 lsb r ladder ladder resistance v ref = v cc 10 25 k w t conv conversion time 19.6 s v ref reference voltage 2.7 v cc v v ia analog input voltage 0 v ref v symbol parameter test conditions unit aed converter characteristics (v cc = av cc = 5 v, v ss = av ss = 0 v, ta = e40 to +85 ?c, f(x in ) = 12 mhz, unless otherwise noted (note)) note. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. notes 1. this applies when the main clock external input selection bit = 1, the main clock division selection bit = 0, and the signal output stop bit = 1. 2. this applies when the main clock external input selection bit = 1 and the system clock stop bit at wait state = 1. 3. this applies when cpu and the clock timer are operating with the sub clock (32.768 khz) selected as the system clock. 4. this applies when the x cout drivability selection bit = 0 and the system clock stop bit at wait state = 1. m
17 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. limits min. max. t c external clock input cycle time (note 1) 83 ns t w(h) external clock input high-level pulse width (note 2) 33 ns t w(l) external clock input low-level pulse width (note 2) 33 ns t r external clock rise time 15 ns t f external clock fall time 15 ns limits min. max. t su(dCe) data input setup time 50 ns t su(rdyC 1) ___ rdy input setup time 80 ns t su(holdC 1) ____ hold input setup time 80 ns t h(eCd) data input hold time 0ns t h( 1Crdy) ___ rdy input hold time 0ns t h( 1Chold) ____ hold input hold time 0ns timing requirements (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C40 to +85 c, f(x in ) = 12 mhz, unless otherwise noted (note 1)) notes 1. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mh z . 2. input signals rise/fall time must be 100 ns or less, unless otherwise noted. external clock input unit symbol parameter notes 1. when the main clock division selection bit = 1, the minimum value of t c = 166 ns. 2. when the main clock division selection bit = 1, values of t w(h) / t c and t w(l) / t c must be set to values from 0.45 through 0.55. unit symbol parameter memory expansion mode and microprocessor mode single-chip mode unit symbol parameter limits min. max. t su(p0dCe) port p0 input setup time 200 ns t su(p1dCe) port p1 input setup time 200 ns t su(p2dCe) port p2 input setup time 200 ns t su(p3dCe) port p3 input setup time 200 ns t su(p4dCe) port p4 input setup time 200 ns t su(p5dCe) port p5 input setup time 200 ns t su(p6dCe) port p6 input setup time 200 ns t su(p7dCe) port p7 input setup time 200 ns t su(p8dCe) port p8 input setup time 200 ns t h(eCp0d) port p0 input hold time 0ns t h(eCp1d) port p1 input hold time 0ns t h(eCp2d) port p2 input hold time 0ns t h(eCp3d) port p3 input hold time 0ns t h(eCp4d) port p4 input hold time 0ns t h(eCp5d) port p5 input hold time 0ns t h(eCp6d) port p6 input hold time 0ns t h(eCp7d) port p7 input hold time 0ns t h(eCp8d) port p8 input hold time 0ns
preliminary notice: this is not a final specification. some parametric limits are subject to change. 18 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp limits min. max. t c(ta) tai in input cycle time 250 ns t w(tah) tai in input high-level pulse width 125 ns t w(tal) tai in input low-level pulse width 125 ns unit symbol parameter timer a input (count input in event counter mode) limits min. max. t c(ta) tai in input cycle time (note) 666 ns t w(tah) tai in input high-level pulse width (note) 333 ns t w(tal) tai in input low-level pulse width (note) 333 ns unit symbol parameter timer a input (gating input in timer mode) limits min. max. t c(ta) tai in input cycle time (note) 666 ns t w(tah) tai in input high-level pulse width 166 ns t w(tal) tai in input low-level pulse width 166 ns unit symbol parameter timer a input (external trigger input in one-shot pulse mode) limits min. max. t w(tah) tai in input high-level pulse width 166 ns t w(tal) tai in input low-level pulse width 166 ns unit symbol parameter timer a input (external trigger input in pulse width modulation mode) limits min. max. t c(up) tai out input cycle time 3333 ns t w(uph) tai out input high-level pulse width 1666 ns t w(upl) tai out input low-level pulse width 1666 ns t su(up? in ) tai out input setup time 666 ns t h(t in ?p) tai out input hold time 666 ns unit symbol parameter timer a input (up-down input in event counter mode) limits min. max. t c(ta) taj in input cycle time 2000 ns t su(taj in ?aj out ) taj in input setup time 500 ns t su(taj out ?aj in ) taj out input setup time 500 ns unit symbol parameter timer a input (two-phase pulse input in event counter mode) note. limits change depending on f(x in ). refer to ?ata formulas?on page 20. note. limits change depending on f(x in ). refer to ?ata formulas?on page 20.
19 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. limits min. max. t c(ck) clk i input cycle time 333 ns t w(ckh) clk i input high-level pulse width 166 ns t w(ckl) clk i input low-level pulse width 166 ns t d(c?) t x d i output delay time 100 ns t h(c?) t x d i hold time 0ns t su(d?) r x d i input setup time 65 ns t h(c?) r x d i input hold time 75 ns limits min. max. t c(tb) tbi in input cycle time (one edge count) 250 ns t w(tbh) tbi in input high-level pulse width (one edge count) 125 ns t w(tbl) tbi in input low-level pulse width (one edge count) 125 ns t c(tb) tbi in input cycle time (both edges count) 500 ns t w(tbh) tbi in input high-level pulse width (both edges count) 250 ns t w(tbl) tbi in input low-level pulse width (both edges count) 250 ns unit symbol parameter timer b input (count input in event counter mode) limits min. max. t c(tb) tbi in input cycle time (note) 666 ns t w(tbh) tbi in input high-level pulse width (note) 333 ns t w(tbl) tbi in input low-level pulse width (note) 333 ns unit symbol parameter timer b input (pulse period measurement mode) limits min. max. t c(tb) tbi in input cycle time (note) 666 ns t w(tbh) tbi in input high-level pulse width (note) 333 ns t w(tbl) tbi in input low-level pulse width (note) 333 ns unit symbol parameter timer b input (pulse width measurement mode) unit symbol parameter a-d trigger input unit symbol parameter serial i/o unit symbol parameter ____ ___ external interrupt int i input, key input interrupt ki i input limits min. max. t w(inh) ___ int i input high-level pulse width 250 ns t w(inl) ___ int i input low-level pulse width 250 ns t w(kil) __ ki i input low-level pulse width 250 ns limits min. max. t c(ad) ____ ad trg input cycle time (minimum allowable trigger) 1333 ns t w(adl) ____ ad trg input low-level pulse width 166 ns note. limits change depending on f(x in ). refer to ?ata formulas?on page 20. note. limits change depending on f(x in ). refer to ?ata formulas?on page 20.
preliminary notice: this is not a final specification. some parametric limits are subject to change. 20 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp data formulas timer a input (gating input in timer mode) 8 5 10 9 2 ?f(f 2 ) 4 5 10 9 2 ?f(f 2 ) 4 5 10 9 2 ?f(f 2 ) limits min. max. symbol parameter unit t c(ta) tai in input cycle time t w(tah) tai in input high-level pulse width t w ( tal ) tai in input low-level pulse width ns ns ns 8 5 10 9 2 ?f(f 2 ) timer a input (external trigger input in one-shot pulse mode) limits min. max. symbol parameter unit t c(ta) tai in input cycle time ns timer b input (in pulse period measurement mode or pulse width measurement mode) limits min. max. symbol parameter unit ns ns ns t c(tb) tbi in input cycle time t w(tbh) tbi in input high-level pulse width t w(tbl) tbi in input low-level pulse width 8 5 10 9 2 ?f(f 2 ) 4 5 10 9 2 ?f(f 2 ) 4 5 10 9 2 ?f(f 2 ) note. f(f 2 ) represents the clock f 2 frequency. for the relation to the main clock and sub clock, refer to table 9 in data sheet ?37733mhbxxxfp?
21 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. switching characteristics (v cc = 2.7 ?5.5 v, v ss = 0 v, ta = 40 to +85?, f(x in ) = 12 mhz, unless otherwise noted (note)) fig. 6 measuring circuit for ports p0 ?p8 and f 1 limits min. max. t d(eep0q) port p0 data output delay time 300 ns t d(eep1q) port p1 data output delay time 300 ns t d(eep2q) port p2 data output delay time 300 ns t d(eep3q) port p3 data output delay time 300 ns t d(eep4q) port p4 data output delay time 300 ns t d(eep5q) port p5 data output delay time 300 ns t d(eep6q) port p6 data output delay time 300 ns t d(eep7q) port p7 data output delay time 300 ns t d(eep8q) port p8 data output delay time 300 ns unit symbol parameter test conditions fig. 6 note. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. single-chip mode 50 pf p 0 p 1 p 2 p 3 p 4 p 5 p 6 p 7 p 8 f 1 e
preliminary notice: this is not a final specification. some parametric limits are subject to change. 22 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp symbol parameter t d(e?q) t h(e?q) address output delay time address output delay time address hold time ale pulse width address output setup time address hold time ale output delay time memory expansion mode and microprocessor mode (v cc = 2.7 ?5.5 v, v ss = 0 v, ta = ?0 to +85?, f(x in ) = 12 mhz (note 1), unless otherwise noted) limits wait mode min. max. test conditions unit 90 10 20 182 20 162 40 40 123 10 93 9 40 4 40 40 131 298 53 20 182 20 182 33 33 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns t d(an?) t d(a?) t d(ale?) t h(e?n) t w(ale) t su(a?le) t h(ale?) t w(el) data output delay time data hold time _ e pulse width floating start delay time floating release delay time ___ bhe output delay time _ r/ w output delay time ___ bhe hold time _ r/ w hold time fig. 6 (note 2) f 1 output delay time t pxz(eedz) t pzx(eedz) t d(bheee) t d(r/wee) t h(eebhe) t h(eer/w) t d(ee f 1 ) t d( f 1 ehlda) ____ hlda output delay time 030 120 notes 1. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. 2. no wait : wait bit = 1. wait 1 : the external memory area is accessed with wait bit = 0 and wait selection bit = 1. wait 0 : the external memory area is accessed with wait bit = 0 and wait selection bit = 0. no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0
23 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. address output delay time address output delay time address hold time ale pulse width address output setup time address hold time ale output delay time data output delay time data hold time _ e pulse width floating start delay time floating release delay time no wait wait 1 wait 0 memory expansion mode and microprocessor mode bus timing data formulas (v cc = 2.7 ?5.5 v, v ss = 0 v, ta = ?0 to + 85 ?, f(x in ) = 12 mhz (max., note 1), unless otherwise noted) 90 10 1 5 10 9 2 ?f(f 2 ) 3 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) 3 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) 2 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) 2 5 10 9 2 ?f(f 2 ) ns ns ns ns ns ns ns ns ns ns no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 1 5 10 9 2 ?f(f 2 ) ns ns ns ns ns ns 9 4 1 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) 2 5 10 9 2 ?f(f 2 ) 4 5 10 9 2 ?f(f 2 ) ns ns 1 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) 3 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) 3 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) 1 5 10 9 2 ?f(f 2 ) ?63 ?68 ?63 ?88 ?43 ?43 ?43 ?73 ?73 ?43 ?43 ?43 ?35 ?35 ?30 ?63 ?68 ?63 ?68 ?50 ?50 unit symbol parameter limits wait mode min. max. t d(an?) t d(a?) t h(e?n) t w(ale) t su(a?le) t h(ale?) t d(ale?) t d(e?q) t h(e?q) t w(el) t pxz(e?z) t pzx(e?z) no wait wait 1 wait 0 ___ bhe output delay time _ r/ w output delay time t d(bhe?) t d(r/w?) t h(e?he) t h(e?/w) t d(e f 1) f 1 output delay time _ r/ w hold time ___ bhe hold time 0 30 ns ns ns ns ns ns ns ns notes 1. this applies when the main-clock division selection bit = 0. 2. f(f 2 ) represents the clock f 2 frequency. for the relation to the main clock and sub clock, refer to table 9 in data sheet m37733mhbxxxfp.
preliminary notice: this is not a final specification. some parametric limits are subject to change. 24 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp timing diagram t w(h) t d(e?0q) t d(e?2q) t d(e?3q) t d(e?4q) t d(e?5q) t d(e?6q) t d(e?7q) t d(e?8q) port p0 output port p0 input port p1 output port p1 input port p2 output port p2 input port p3 output port p3 input e x in port p4 output port p4 input port p5 output port p5 input port p6 output port p6 input port p7 output port p7 input port p8 output port p8 input t su(p0d?) t h(e?0d) t d(e?1q) t r t f t w(l) t c t su(p1d?) t h(e?1d) t su(p2d?) t h(e?2d) t su(p3d?) t h(e?3d) t su(p4d?) t h(e?4d) t su(p5d?) t h(e?5d) t su(p6d?) t h(e?6d) t su(p7d?) t h(e?7d) t su(p8d?) t h(e?8d)
25 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. tai in input tai out input t c(ta) t w(tah) t w(tal) t c(up) t w(uph) t w(upl) t h(t in ?p) t su(up? in ) tai out input (up-down input) tai in input (when count by falling) tai in input (when count by rising) in event counter mode taj in input taj out input t c(ta) t su(taj in ?aj out ) t su(taj in ?aj out ) t su(taj out ?aj in ) t su(taj out ?aj in ) in event counter mode (when two-phase pulse input is selected) t c(tb) t w(tbh) t w(tbl) tbi in input
preliminary notice: this is not a final specification. some parametric limits are subject to change. 26 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp t c(ad) t w(adl) t c(ck) t w(ckh) t w(ckl) t w(inl) t w(knl) t d(c?) t su(d?) t h(c?) t w(inh) ad trg input clk i txd i rxd i inti input kli input t h(c?)
27 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. memory expansion mode and microprocessor mode (when wait bit = ?? ( when wait bit = ?? (when wait bit = ??or ??in common) test conditions ?v cc = 2.7 ?5.5 v ?input timing voltage : v il = 0.2 v cc , v ih = 0.8 v cc ?output timing voltage : v ol = 0.8 v, v oh = 2.0 v f 1 rdy input f 1 e rdy input f 1 hold input hlda output t su(rdy f 1 ) t h( f 1 ?dy) t su(rdy f 1 ) t h( f 1 ?dy) t su(hold f 1 ) t d( f 1 ?lda) t h( f 1 ?old) t d( f 1 ?lda) e
preliminary notice: this is not a final specification. some parametric limits are subject to change. 28 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp f 1 t d(e- f 1) t d(an-e) t w(ale) t d(ale-e) t su(a-ale) t d(a-e) t d(e-dq) t h(ale-a) t d(bhe-e) t h(e-bhe) t d(r/w-e) t h(e-r/w) t h(e-dq) t pxz(e-dz) t su(d-e) t h(e-d) t pzx(e-dz) t h(e-an) t d(e- f 1) t w(el) t w(h) e an ale am/dm dm in bhe r/ w address address address data data address address address t f t r t c t w(l) memory expansion mode and microprocessor mode (no wait : when wait bit = 1) test conditions v cc = 2.7 e 5.5 v output timing voltage : v ol = 0.8 v, v oh = 2.0 v data input dm in : v il = 0.16 v cc , v ih = 0.5 v cc x in
29 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. t w(ale) t c address t w(l) t w(h) t f t r memory expansion mode and microprocessor mode (wait 1 : the external memory area is accessed when wait bit = ??and wait selection bit = ??) address address t d(e f 1 ) t d(an?) t d(ale?) t su(aale) t h(ale?) t d(a?) t d(e?q) t h(e?) t pzx(e?z) t h(e?he) t su(de) test conditions ?vcc = 2.7 ?5.5 v ?output timing voltage : v ol = 0.8 v, v oh = 2.0 v ?data input dm in : v il = 0.16 vcc, v ih = 0.5 vcc data address data t d(e f 1 ) address t pxz(e?z) t w(el) t h(e?n) t h(e?q) t h(e?/w) t d(r/w?) t d(bhe?) x in e an ale am/dm dm in bhe r /w f 1
preliminary notice: this is not a final specification. some parametric limits are subject to change. 30 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp t h(ale?) t d(ale?) t d(e?q) t w(l) t w(h) t f t c t r memory expansion mode and microprocessor mode (wait 0 : the external memory area is accessed when wait bit = ??and wait selection bit = ??) x in f 1 address address address address data an ale am/dm dm in r /w t d(an?) t w(ale) t su(a?le) t h(e?q) t d(a?) t pxz(e?z) t pzx(e?z) t h(e?) t su(d?) address data address test conditions ?vcc = 2.7 ?5.5 v ?output timing voltage : v ol = 0.8 v, v oh = 2.0 v ?data input dm in : v il = 0.16 vcc, v ih = 0.5 vcc t d(e f 1 ) t d(e f 1 ) t d(r/w?) t h(e?/w) t w(el) t h(e?n) t d(bhe?) t h(e?he) e bhe
31 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change. package outline
preliminary notice: this is not a final specification. some parametric limits are subject to change. 32 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp 7700 family writing to prom order confirmation form single-chip 16-bit microcomputer M37733EHLxxxhp mitsubishi electric date: receipt gzz?h00?2b<68a0> ( ) note : please fill in all items marked customer rom number supervisor company name date issued date: tel 1. confirmation specify the name of the product being ordered and the type of eproms submitted. three sets of eproms are required for each pattern. if at least two of the three sets of eproms submitted contain the identical data, we will produce writing to prom based on this data. we shall assume the responsibility for errors only if the written prom data on the products we produce differ from this d ata. thus, the customer must be especially careful in verifying the data contained in the eproms submitted. checksum code for entire eprom areas eprom type : 2. mark specification mark specification must be submitted using the correct form for the type of package being ordered fill out the appropriate 80p6d mark specification form (for M37733EHLxxxhp) and attach to the writing to prom order confirmation form. (1) set ?f 16 ?in the shaded area. (2) address 0 16 to 0f 16 are the area for storing the data on model designation.this area must be written with the data shown below. address and data are written in hexadecimal notation. 3. comments 0 3 7 5 2 f a e c b (hexadecimal notation) 27c201 128k 3ffff data address address 9 8 d 4 1 6 responsible officer section head signature supervisor signature issuance signatures 4d 33 37 37 33 45 48 33 4c ff ff ff ff ff ff ff 00010 20000 00000
33 mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change.
? 1996 mitsubishi electric corp. h-lf447-a ki-9610 printed in japan (rod) 2 new publication, effective oct. 1996. specifications subject to change without notice. notes regarding these materials these materials are intended as a reference to assist our customers in the selection of the mitsubishi semiconductor product best suited to the customer?s application; they do not convey any license under any intellectual property rights, or any other rights, belonging to mitsubishi electric corporation or a third party. mitsubishi electric corporation assumes no responsibility for any damage, or infringement of any third-party?s rights, originating in the use of any product data, diagrams, charts or circuit application examples contained in these materials. all information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by mitsubishi electric corporation without notice due to product improvements or other reasons. it is therefore recommended that customers contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for the latest product information before purchasing a product listed herein. mitsubishi electric corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. the prior written approval of mitsubishi electric corporation is necessary to reprint or reproduce in whole or in part these materials. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for further details on these materials or the products contained therein. keep safety first in your circuit designs! mitsubishi electric corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. mitsubishi microcomputers M37733EHLxxxhp prom version of m37733mhlxxxhp preliminary notice: this is not a final specification. some parametric limits are subject to change.
page p1 pin con- figuration (top view) p9 fig. 5 p13 right column line 2 line 10 p17 memory expan- sion mode and microprocessor mode rev. rev. no. date 1.00 first edition 970604 1.01 the following are added: 980421 ? prom order confirmation form ? mark specification form 2.00 the following are revised: 980731 revision description list M37733EHLxxxhp datasheet (1) revision description previous version outline 80p6d-a the M37733EHLxxxhp has 28 powerful addressing modes. refer to the mitsubishi semiconductors data book single- chip 16-bit microcomputers for the details of each addressing mode. machine instruction list the M37733EHLxxxhp has 103 machine instructions. refer to the mitsubishi semiconductors data book single- chip 16-bit microcomputers for details. revised version outline 80p6d-a, 80p6q-a the M37733EHLxxxhp has 28 powerful addressing modes. refer to the 7700 family software manual for the details. machine instruction list the M37733EHLxxxhp has 103 machine instructions. refer to the 7700 family software manual for the details. previous version revised version symbol parameter limits unit min. max. tsu (dCe) data input setup time 80 ns symbol parameter limits unit min. max. tsu (dCe) data input setup time 50 ns (2) 80p6d mark specification form (2) 80p6d, 80p6q mark specification form

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